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Specialist
Former Senior Manager at Advantech
Agenda
- Andes Technology (TPE: 6533) and SiFive’s relationship with fabless IC players and IP service providers in the automotive segment
- Automotive manufacturers’ willingness to adopt the RISC-V (reduced instruction set computer-V) architecture and implications for IP players
- Functional safety requirements on auto application, Andes Technology’s auto order types and premium
- High-performance RISC-V CPU (central processing units) market feedback, plus Andes Technology’s product compatibility with AI terminals
Questions
1.
How does the RISC-V (reduced instruction set computer-V) architecture’s compatibility with or importance to automotive chips differ from its compatibility with or importance to chips used for consumer electronics or HPC (high-performance computing) applications?
2.
Has any automotive chip that adopts the RISC-V architecture been mounted in vehicles or come into mass production?
3.
You mentioned earlier that the reliability, functional safety and security of automotive electronic products are very important. Does the RISC-V architecture perform better than traditional architectures in these three aspects or not?
4.
Why do the functional safety standards related to the RISC-V architecture develop slower than those related to mainstream architectures? Could you give us some examples to explain it?
5.
What are the major types of automotive ICs (integrated circuits) ordered from players such as Andes Technology?
6.
Most of the ADAS chip orders received by Andes Technology are actually for DMS (driver monitoring system) chips. Does this have anything to do with the software ecosystem? Or is the RISC-V architecture still too immature to be used for ADAS chips?
7.
How high is the performance of RISC-V CPU IP cores for ADAS applications? Could you give us some examples to explain it? Is it about how advanced process nodes are or about how well CPU cores perform?
8.
What are the barriers to entry into the high-performance RISC-V CPU IP core market? Why is the number of players in the market so limited?
9.
Automotive chips with the RISC-V architecture have not been mass produced yet, so it may be too early to discuss royalties. Will the licensing fees for RISC-V CPU IP cores for auto applications be higher than those for RISC-V CPU IP cores for other applications?
10.
Have players such as Andes Technology placed great emphasis on the development of RISC-V CPU IP cores for auto applications because they can charge higher licensing fees for those products? Or have they not focused on those products because of the long development and verification period?
11.
What are the direct clients of IP core vendors such as Andes Technology? Are their direct clients fabless chip companies, front-end IP service providers or tier 1 auto parts suppliers?
12.
Do auto manufacturers have strong incentives to have an additional optional architecture for automotive chips? Or do they prefer to use automotive chips with mature architectures that have passed functional safety verification to reduce risks and do not have much incentive to have a new architecture?
13.
Could you compare Andes Technology and its competitors in terms of technologies and positioning strategies for RISC-V CPU IP cores for auto applications?
14.
What are the cooperative relationships like between IP core vendors such as Andes Technology and IP service providers such as Socioinext? Do IP core vendors need to convince IP service providers to use the RISC-V architecture, or do they cooperate with each other to convince cloud service providers or other types of clients to use the RISC-V architecture?
15.
Do you think RISC-V CPU IP cores for AI applications with HPC requirements will serve as a growth driver for Andes Technology? Or is it not necessary to adopt the RISC-V architecture for those products?
16.
What is the market feedback on Andes Technology’s new AX60 series?
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